| A 124-Gb/s decoder for generalized integrated interleaved codes W Li, J Lin, Z Wang IEEE Transactions on Circuits and Systems I: Regular Papers 66 (8), 3174-3187, 2019 | 20 | 2019 |
| Modified GII-BCH codes for low-complexity and low-latency encoders W Li, J Tian, J Lin, Z Wang IEEE Communications Letters 23 (5), 785-788, 2019 | 8 | 2019 |
| Low-Complexity Precision-Scalable Multiply-Accumulate Unit Architectures for Deep Neural Network Accelerators W Li, A Hu, G Wang, N Xu, G He IEEE Transactions on Circuits and Systems II: Express Briefs 70 (4), 1610-1614, 2023 | 6 | 2023 |
| Multi-layer generalized integrated interleaved codes W Li, J Lin, Z Wang IEEE Communications Letters 24 (9), 1880-1884, 2020 | 6 | 2020 |
| An efficient post processing scheme to lower the error floor of LDPC decoders W Li, J Lin, Z Wang 2017 IEEE 17th International Conference on Communication Technology (ICCT …, 2017 | 5 | 2017 |
| Fast and low-complexity decoding algorithm and architecture for quadruple-error-correcting RS codes Z Yan, W Li, J Lin, Z Wang 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 191-194, 2018 | 4 | 2018 |
| An Efficient Stochastic Convolution Accelerator based on Pseudo-Sobol Sequences A Hu, W Li, D Lv, G He Proceedings of the 17th ACM International Symposium on Nanoscale …, 2022 | 3 | 2022 |
| Efficient Compression Methods for Wire-Spread-Based Stochastic Computing Deep Neural Networks W Li, N Xu, R Wang, G He IEEE Transactions on Circuits and Systems II: Express Briefs 69 (11), 4538-4542, 2022 | 3 | 2022 |
| A Low-Complexity Error-and-Erasure Decoding Algorithm for t= 2 RS Codes Z Yan, W Li, J Lin, Z Wang 2019 IEEE International Workshop on Signal Processing Systems (SiPS), 43-47, 2019 | 3 | 2019 |
| A Precision-Scalable Deep Neural Network Accelerator With Activation Sparsity Exploitation W Li, A Hu, N Xu, G He IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 2 | 2023 |
| Improved soft-assisted iterative bounded distance decoding for product codes W Li, J Lin, Z Wang 2019 IEEE 5th International Conference on Computer and Communications (ICCC …, 2019 | 2 | 2019 |
| Comparison between generalized integrated interleaved codes and generalized error location codes W Li, J Lin, Z Wang 2018 IEEE 18th International Conference on Communication Technology (ICCT …, 2018 | 2 | 2018 |
| Quantization and Hardware Architecture Co-Design for Matrix-Vector Multiplications of Large Language Models W Li, A Hu, N Xu, G He IEEE Transactions on Circuits and Systems I: Regular Papers, 2024 | 1 | 2024 |
| CoDA: A Co-Design Framework for Versatile and Efficient Attention Accelerators W Li, A Hu, N Xu, G He IEEE Transactions on Computers, 2024 | | 2024 |
| Efficient Parallel Stochastic Computing Multiply-Accumulate (MAC) Technique Using Pseudo-Sobol Bit-Streams A Hu, W Li, D Lyu, G He IEEE Transactions on Nanotechnology, 2024 | | 2024 |
Zhongfeng WangNanjing UniversityVerified email at nju.edu.cn
