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Seon-Kyoo Lee
Seon-Kyoo Lee
Verified email at postech.ac.kr
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Year
A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18m CMOS
SK Lee, YH Seo, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 45 (12), 2874-2881, 2010
2002010
A 21 fJ/conversion-step 100 kS/s 10-bit ADC with a low-noise time-domain comparator for low-power sensor interface
SK Lee, SJ Park, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 46 (3), 651-659, 2011
1952011
A 1.3 μW 0.6 V 8.7-ENOB successive approximation ADC in a 0.18 μm CMOS
SK Lee, SJ Park, Y Suh, HJ Park, JY Sim
2009 Symposium on VLSI Circuits, 242-243, 2009
742009
A 650Mb/s-to-8Gb/s referenceless CDR circuit with automatic acquisition of data rate
SK Lee, YS Kim, H Ha, Y Seo, HJ Park, JY Sim
2009 IEEE International Solid-State Circuits Conference-Digest of Technical…, 2009
632009
FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel links
SK Lee, K Lee, HJ Park, JY Sim
Electronics letters 44 (4), 1, 2008
592008
A 95fJ/b current-mode transceiver for 10mm on-chip interconnect
SK Lee, SH Lee, D Sylvester, D Blaauw, JY Sim
2013 IEEE International Solid-State Circuits Conference Digest of Technical…, 2013
562013
7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG= 640s and 800MB/s I/O rate
S Lee, J Lee, I Park, J Park, S Yun, M Kim, J Lee, M Kim, K Lee, T Kim, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 138-139, 2016
512016
A 110 MHz to 1.4 GHz locking 40-phase all-digital DLL
YS Kim, SK Lee, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 46 (2), 435-444, 2011
502011
Current-mode transceiver for silicon interposer channel
SH Lee, SK Lee, B Kim, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 49 (9), 2044-2053, 2014
412014
Inactivation of S. mutans Using an Atmospheric Plasma Driven by a Palm-Size-Integrated Microwave Power Module
SJ Park, J Choi, GY Park, SK Lee, Y Cho, JI Yun, S Jeon, KT Kim, JK Lee, ...
IEEE Transactions on plasma science 38 (8), 1956-1962, 2010
352010
A 1-GHz Digital PLL With a 3-ps Resolution Floating-Point-Number TDC in a 0.18-CMOS
YH Seo, SK Lee, JY Sim
IEEE Transactions on Circuits and Systems II: Express Briefs 58 (2), 70-74, 2011
302011
7.6 1gb/s 2tb nand flash multi-chip package with frequency-boosting interface chip
HJ Kim, JD Lim, JW Lee, DH Na, JH Shin, CH Kim, SW Yu, JY Shin, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of…, 2015
292015
A 5 Gb/s single-ended parallel receiver with adaptive crosstalk-induced jitter cancellation
SK Lee, B Kim, HJ Park, JY Sim
IEEE journal of solid-state circuits 48 (9), 2118-2127, 2013
262013
A 0.5 V, 11.3-μW, 1-kS/s resistive sensor interface circuit with correlated double sampling
H Ha, Y Suh, SK Lee, HJ Park, JY Sim
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-4, 2012
262012
Time-domain voltage comparator for analog-to-digital converter
SK Lee, JY Sim
US Patent 8,373,444, 2013
212013
An 8GB/s quad-skew-cancelling parallel transceiver in 90nm CMOS for high-speed DRAM interface
YS Kim, SK Lee, SJ Bae, YS Sohn, JB Lee, JS Choi, HJ Park, JY Sim
2012 IEEE International Solid-State Circuits Conference, 136-138, 2012
182012
Mictostrip transmission line structure with vertical stubs for reducing far-end crosstalk
HJ Park, JY Sim, KH Lee, SK Lee
US Patent 8,159,310, 2012
142012
A 0.5-V, 1.47-40-kS/s 13-bit SAR ADC With Capacitor Error Compensation
H Ha, SK Lee, B Kim, HJ Park, JY Sim
IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 840-844, 2014
132014
A 5Gb/s single-ended parallel receiver with adaptive FEXT cancellation
SK Lee, H Ha, HJ Park, JY Sim
2012 IEEE international solid-state circuits conference, 140-142, 2012
122012
A QDR-based 6-GB/s parallel transceiver with current-regulated voltage-mode output driver and byte CDR for memory interface
SK Lee, B Kim, HJ Park, JY Sim
IEEE Transactions on Circuits and Systems II: Express Briefs 60 (2), 91-95, 2013
92013
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