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Mustafa Badaroglu
Mustafa Badaroglu
Overená e-mailová adresa na: qti.qualcomm.com - Domovská stránka
Názov
Citované v
Citované v
Rok
Towards fog-driven IoT eHealth: Promises and challenges of IoT in medicine and healthcare
B Farahani, F Firouzi, V Chang, M Badaroglu, N Constant, K Mankodiya
Future generation computer systems 78, 659-676, 2018
10692018
Metrology for the next generation of semiconductor devices
NG Orji, M Badaroglu, BM Barnes, C Beitia, BD Bunday, U Celano, ...
Nature electronics 1 (10), 532-547, 2018
3282018
Internet-of-Things and big data for smarter healthcare: From device to architecture, applications and analytics
F Firouzi, AM Rahmani, K Mankodiya, M Badaroglu, GV Merrett, P Wong, ...
Future Generation Computer Systems 78, 583-586, 2018
3002018
Internet-of-Things and big data for smarter healthcare: From device to architecture, applications and analytics
F Firouzi, AM Rahmani, K Mankodiya, M Badaroglu, GV Merrett, P Wong, ...
Future Generation Computer Systems 78, 583-586, 2018
3002018
Ultra-wide-band transmitter for low-power wireless body area networks: Design and evaluation
J Ryckaert, C Desset, A Fort, M Badaroglu, V De Heyn, P Wambacq, ...
IEEE transactions on circuits and systems I: Regular papers 52 (12), 2515-2525, 2005
2942005
Method, apparatus and computer program product for determination of noise in mixed signal systems
M Van Heijningen, M Badaroglu
US Patent 6,941,258, 2005
2212005
Substrate noise coupling in mixed-signal ASICs
S Donnay, G Gielen
Kluwer Academic Publishers, 2003
1552003
Substrate noise generation in complex digital systems: Efficient modeling and simulation methodology and experimental verification
M Van Heijningen, M Badaroglu, S Donnay, GGE Gielen, HJ De Man
IEEE Journal of Solid-State Circuits 37 (8), 1065-1072, 2002
1362002
A 16mA UWB 3-to-5GHz 20Mpulses/s Quadrature Analog Correlation Receiver in 0.18/spl mu/m CMOS
J Ryckaert, M Badaroglu, V De Heyn, G Van der Plas, P Nuzzo, ...
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
1242006
Impact of Wire Geometry on Interconnect RC and Circuit Delay
I Ciofi, A Contino, PJ Roussel, R Baert, VH Vega-Gonzalez, K Croes, ...
IEEE Transactions on Electron Devices 63 (6), 2488-2496, 2016
1012016
Wireless technologies: circuits, systems, and devices
K Iniewski
CRC press, 2017
952017
Auto-calibration of magnetic sensor
O Charlier, F Laulanet, M Badaroglu
US Patent App. 11/873,331, 2008
902008
Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits
M Badaroglu, M Van Heijningen, V Gravot, J Compiet, S Donnay, ...
IEEE Journal of Solid-State Circuits 37 (11), 1383-1395, 2002
882002
A CMOS ultra-wideband receiver for low data-rate communication
J Ryckaert, M Verhelst, M Badaroglu, S D'Amico, V De Heyn, C Desset, ...
IEEE Journal of Solid-State Circuits 42 (11), 2515-2527, 2007
872007
High-level simulation of substrate noise generation including power supply noise coupling
M Van Heijningen, M Badaroglu, S Donnay, M Engels, I Bolsens
Proceedings of the 37th Annual Design Automation Conference, 446-451, 2000
782000
Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires
MG Bardon, Y Sherazi, P Schuddinck, D Jang, D Yakimets, P Debacker, ...
2016 IEEE International Electron Devices Meeting (IEDM), 28.2. 1-28.2. 4, 2016
762016
Method of auto calibrating a magnetic field sensor for drift and structure therefor
O Charlier, F Laulanet, M Badaroglu
US Patent 8,134,358, 2012
692012
Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies
M Badaroglu, S Donnay, HJ De Man, YA Zinzius, GGE Gielen, W Sansen, ...
IEEE Journal of Solid-State Circuits 38 (7), 1250-1260, 2003
632003
Modeling of via resistance for advanced technology nodes
I Ciofi, PJ Roussel, Y Saad, V Moroz, CY Hu, R Baert, K Croes, A Contino, ...
IEEE transactions on Electron Devices 64 (5), 2306-2313, 2017
612017
Evolution of substrate noise generation mechanisms with CMOS technology scaling
M Badaroglu, P Wambacq, G Van der Plas, S Donnay, GGE Gielen, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 53 (2), 296-305, 2006
612006
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