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Srijit Mukherjee
Srijit Mukherjee
Module & Integr Yield Eng, Portland Technology Develop, Intel
Verified email at intel.com
Title
Cited by
Cited by
Year
Structure zone model for extreme shadowing conditions
S Mukherjee, D Gall
Thin Solid Films 527, 158-163, 2013
1302013
Integrated circuits with selective gate electrode recess
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent 8,896,030, 2014
962014
Transport phenomena in conduction mode laser beam welding of Fe–Al dissimilar couple with Ta diffusion barrier
S Mukherjee, S Chakraborty, R Galun, Y Estrin, I Manna
International Journal of Heat and Mass Transfer 53 (23), 5274-5282, 2010
482010
Anomalous scaling during glancing angle deposition
S Mukherjee, D Gall
Applied Physics Letters 95 (17), 2009
362009
Power law scaling during physical vapor deposition under extreme shadowing conditions
S Mukherjee, D Gall
Journal of Applied Physics 107 (8), 2010
332010
Temperature-induced chaos during nanorod growth by physical vapor deposition
S Mukherjee, CM Zhou, D Gall
Journal of Applied Physics 105 (9), 2009
262009
Dual metal silicide structures for advanced integrated circuit structure fabrication
S Mukherjee, V BHAGWAT, ML Hattendorf, CP Auth
US Patent 10,796,968, 2020
182020
Integrated circuits with selective gate electrode recess
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent 9,418,898, 2016
52016
Dual metal silicide structures for advanced integrated circuit structure fabrication
S Mukherjee, V BHAGWAT, ML Hattendorf, CP Auth
US Patent 10,840,151, 2020
42020
Integrated circuits with recessed gate electrodes
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent 10,020,232, 2018
42018
Integrated circuits with recessed gate electrodes
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent 10,651,093, 2020
32020
Dual metal silicide structures for advanced integrated circuit structure fabrication
S Mukherjee, V BHAGWAT, ML Hattendorf, CP Auth
US Patent 11,508,626, 2022
22022
Dual contact process with selective deposition
K Cook, AS Murthy, G Dewey, N Haratipour, C Choi, JK Jha, S Mukherjee
US Patent App. 17/033,373, 2022
12022
Integrated circuit structures including a titanium silicide material
DS Lavric, GA Glass, TT Troeger, S Vishwanath, JK Jha, JF Richards, ...
US Patent App. 16/912,118, 2021
12021
Effect of Process Parameters on Laser Surface Hardening of Plain Carbon Eutectoid Steel
S Mukherjee, S Chakraborty, I Manna
Computers, Materials & Continua (CMC) 10 (3), 217, 2009
12009
Dual metal silicide structures for advanced integrated circuit structure fabrication
S Mukherjee, V BHAGWAT, ML Hattendorf, CP Auth
US Patent App. 18/435,609, 2024
2024
Dual metal silicide structures for advanced integrated circuit structure fabrication
S Mukherjee, V BHAGWAT, ML Hattendorf, CP Auth
US Patent 11,961,767, 2024
2024
Integrated circuits with recessed gate electrodes
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent App. 17/505,468, 2022
2022
Integrated circuits with recessed gate electrodes
S Mukherjee, CJ Wiegand, TJ Weeks, MY Liu, ML Hattendorf
US Patent 11,183,432, 2021
2021
Use of noble metals in the formation of conductive connectors
CJ Jezewski, S Mukherjee, DB Bergstrom, TK Indukuri, F Griggio, ...
US Patent 11,094,587, 2021
2021
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