Alexandru Paler
Cited by
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An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures
A Zulehner, A Paler, R Wille
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
An efficient methodology for mapping quantum circuits to the IBM QX architectures
A Zulehner, A Paler, R Wille
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Encoding electronic spectra in quantum circuits with linear T complexity
R Babbush, C Gidney, DW Berry, N Wiebe, J McClean, A Paler, A Fowler, ...
Physical Review X 8 (4), 041015, 2018
Fault-tolerant, high-level quantum circuits: form, compilation and description
A Paler, I Polian, K Nemoto, SJ Devitt
Quantum Science and Technology 2 (2), 025003, 2017
Skyrmion Logic System for Large-Scale Reversible Computation
M Chauwin, X Hu, F Garcia-Sanchez, N Betrabet, A Paler, C Moutafis, ...
Physical Review Applied 12 (6), 064053, 2019
Removing leakage-induced correlated errors in superconducting quantum error correction
M McEwen, D Kafri, Z Chen, J Atalaya, KJ Satzinger, C Quintana, ...
Nature communications 12 (1), 1761, 2021
Scalable service deployment on software-defined networks
J Rubio-Loyola, A Galis, A Astorga, J Serrat, L Lefevre, A Fischer, A Paler, ...
IEEE Communications Magazine 49 (12), 84-93, 2011
Exponential suppression of bit or phase errors with cyclic error correction
Nature 595 (7867), 383-387, 2021
Parallelizing the queries in a bucket-brigade quantum random access memory
A Paler, O Oumarou, R Basmadjian
Physical Review A 102 (3), 032608, 2020
On the influence of initial qubit placement during NISQ circuit compilation
A Paler
Quantum Technology and Optimization Problems: First International Workshop …, 2019
Mapping of topological quantum circuits to physical hardware
A Paler, SJ Devitt, K Nemoto, I Polian
Scientific reports 4 (1), 4657, 2014
Machine learning optimization of quantum circuit layouts
A Paler, L Sasu, AC Florea, R Andonie
ACM Transactions on Quantum Computing 4 (2), 1-25, 2023
Synthesis of arbitrary quantum circuits to topological assembly
A Paler, SJ Devitt, AG Fowler
Scientific reports 6 (1), 30600, 2016
NISQ circuit compilation is the travelling salesman problem on a torus
A Paler, A Zulehner, R Wille
Quantum Science and Technology 6 (2), 025016, 2021
Platforms and software systems for an autonomic internet
J Rubio-Loyola, A Astorga, J Serrat, WK Chai, L Mamatas, A Galis, ...
2010 IEEE Global Telecommunications Conference GLOBECOM 2010, 1-6, 2010
An introduction into fault-tolerant quantum computing
A Paler, SJ Devitt
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
Tomographic testing and validation of probabilistic circuits
A Paler, A Alaghi, I Polian, JP Hayes
2011 Sixteenth IEEE European Test Symposium, 63-68, 2011
Detection and diagnosis of faulty quantum circuits
A Paler, I Polian, JP Hayes
17th Asia and South Pacific Design Automation Conference, 181-186, 2012
Software-based pauli tracking in fault-tolerant quantum circuits
A Paler, S Devitt, K Nemoto, I Polian
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014
Synthesis of arbitrary quantum circuits to topological assembly: Systematic, online and compact
A Paler, AG Fowler, R Wille
Scientific reports 7 (1), 1-16, 2017
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