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Zhuolun He
Zhuolun He
Verified email at cse.cuhk.edu.hk - Homepage
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Cited by
Year
Chateda: A large language model powered autonomous agent for eda
H Wu, Z He, X Zhang, X Yao, S Zheng, H Zheng, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
1052024
Understanding graphs in EDA: From shallow to deep learning
Y Ma, Z He, W Li, L Zhang, B Yu
Proceedings of the 2020 international symposium on physical design, 119-126, 2020
552020
Functionality matters in netlist representation learning
Z Wang, C Bai, Z He, G Zhang, Q Xu, TY Ho, B Yu, Y Huang
Proceedings of the 59th ACM/IEEE Design Automation Conference, 61-66, 2022
452022
Learn to floorplan through acquisition of effective local search heuristics
Z He, Y Ma, L Zhang, P Liao, N Wong, B Yu, MDF Wong
2020 IEEE 38th International Conference on Computer Design (ICCD), 324-331, 2020
412020
Graph learning-based arithmetic block identification
Z He, Z Wang, C Bai, H Yang, B Yu
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-8, 2021
332021
FPGA-based real-time super-resolution system for ultra high definition videos
Z He, H Huang, M Jiang, Y Bai, G Luo
2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018
302018
Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks
H Wu, H Zheng, Z He, B Yu
arXiv preprint arXiv:2401.02731, 2024
142024
AlphaSyn: Logic synthesis optimization with efficient monte carlo tree search
Z Pei, F Liu, Z He, G Chen, H Zheng, K Zhu, B Yu
2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023
112023
Efficient super-resolution system with block-wise hybridization and quantized winograd on fpga
B Shi, J Zhang, Z He, X Wei, S Li, G Luo, H Zheng, Y Xie
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023
112023
Physical synthesis for advanced neural network processors
Z He, P Liao, S Liu, Y Ma, Y Lin, B Yu
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
102021
Reinforcement learning driven physical synthesis
Z He, L Zhang, P Liao, Y Ma, B Yu
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit …, 2020
102020
X-Check: GPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms
Z He, Y Ma, B Yu
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022
82022
Customized retrieval augmented generation and benchmarking for eda tool documentation qa
Y Pu, Z He, T Qiu, H Wu, B Yu
arXiv preprint arXiv:2407.15353, 2024
72024
Large language models for eda: Future or mirage?
Z He, B Yu
Proceedings of the 2024 International Symposium on Physical Design, 65-66, 2024
72024
Efficient arithmetic block identification with graph learning and network-flow
Z Wang, Z He, C Bai, H Yang, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022
72022
LSTP: A Logic Synthesis Timing Predictor
H Zheng, Z He, F Liu, Z Pei, B Yu
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 728-733, 2024
62024
AutoGraph: Optimizing DNN computation graph for parallel GPU kernel execution
Y Zhao, Q Sun, Z He, Y Bai, B Yu
Proceedings of the AAAI Conference on Artificial Intelligence 37 (9), 11354 …, 2023
62023
Fgnn2: A powerful pre-training framework for learning the logic functionality of circuits
Z Wang, C Bai, Z He, G Zhang, Q Xu, TY Ho, Y Huang, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
42024
OpenDRC: An efficient open-source design rule checking engine with hierarchical GPU acceleration
Z He, Y Zuo, J Jiang, H Zheng, Y Ma, B Yu
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
42023
Deep model compression and inference speedup of sum–product networks on tensor trains
CY Ko, C Chen, Z He, Y Zhang, K Batselier, N Wong
IEEE Transactions on Neural Networks and Learning Systems 31 (7), 2665-2671, 2019
42019
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