| Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates H Mertens, R Ritzenthaler, A Hikavyy, MS Kim, Z Tao, K Wostyn, SA Chew, ... 2016 IEEE symposium on VLSI technology, 1-2, 2016 | 215 | 2016 |
| Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates H Mertens, R Ritzenthaler, A Chasin, T Schram, E Kunnen, A Hikavyy, ... 2016 IEEE International Electron Devices Meeting (IEDM), 19.7. 1-19.7. 4, 2016 | 165 | 2016 |
| Capacitor-less, long-retention (> 400s) DRAM cell paving the way towards low-power and high-density monolithic 3D DRAM A Belmonte, H Oh, N Rassoul, GL Donadio, J Mitard, H Dekkers, ... 2020 IEEE International Electron Devices Meeting (IEDM), 28.2. 1-28.2. 4, 2020 | 116 | 2020 |
| High-performance a-In-Ga-Zn-O Schottky diode with oxygen-treated metal contacts A Chasin, S Steudel, K Myny, M Nag, TH Ke, S Schols, J Genoe, G Gielen, ... Applied Physics Letters 101 (11), 2012 | 98 | 2012 |
| Vertically stacked gate-all-around Si nanowire CMOS transistors with reduced vertical nanowires separation, new work function metal gate solutions, and DC/AC performance … R Ritzenthaler, H Mertens, V Pena, G Santoro, A Chasin, K Kenis, ... 2018 IEEE International Electron Devices Meeting (IEDM), 21.5. 1-21.5. 4, 2018 | 94 | 2018 |
| Gigahertz operation of a-IGZO Schottky diodes A Chasin, M Nag, A Bhoolokam, K Myny, S Steudel, S Schols, J Genoe, ... IEEE transactions on electron devices 60 (10), 3407-3412, 2013 | 82 | 2013 |
| A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability B Kaczer, J Franco, P Weckx, PJ Roussel, V Putcha, E Bury, M Simicic, ... Microelectronics Reliability 81, 186-194, 2018 | 70 | 2018 |
| An integrated a-IGZO UHF energy harvester for passive RFID tags A Chasin, V Volskiy, M Libois, K Myny, M Nag, M Rockelé, ... IEEE Transactions on Electron Devices 61 (9), 3289-3295, 2014 | 59 | 2014 |
| Bidirectional communication in an HF hybrid organic/solution-processed metal-oxide RFID tag K Myny, M Rockelé, A Chasin, DV Pham, J Steiger, S Botnaras, D Weber, ... IEEE Transactions on Electron Devices 61 (7), 2387-2393, 2014 | 57 | 2014 |
| High-performance a-IGZO thin film diode as selector for cross-point memory application A Chasin, L Zhang, A Bhoolokam, M Nag, S Steudel, B Govoreanu, ... IEEE Electron Device Letters 35 (6), 642-644, 2014 | 57 | 2014 |
| Tailoring IGZO-TFT architecture for capacitorless DRAM, demonstrating > 103s retention, >1011 cycles endurance and Lg scalability down to 14nm A Belmonte, H Oh, S Subhechha, N Rassoul, H Hody, H Dekkers, ... 2021 IEEE International Electron Devices Meeting (IEDM), 10.6. 1-10.6. 4, 2021 | 53 | 2021 |
| Single‐source dual‐layer amorphous IGZO thin‐film transistors for display and circuit applications M Nag, A Chasin, M Rockele, S Steudel, K Myny, A Bhoolokam, A Tripathi, ... Journal of the Society for Information Display 21 (3), 129-136, 2013 | 52 | 2013 |
| First demonstration of sub-12 nm Lg gate last IGZO-TFTs with oxygen tunnel architecture for front gate devices S Subhechha, N Rassoul, A Belmonte, R Delhougne, K Banerjee, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 45 | 2021 |
| Junctionless gate-all-around lateral and vertical nanowire FETs with simplified processing for advanced logic and analog/RF applications and scaled SRAM cells A Veloso, B Parvais, P Matagne, E Simoen, T Huynh-Bao, V Paraschiv, ... 2016 IEEE Symposium on VLSI Technology, 1-2, 2016 | 42 | 2016 |
| High performance a‐IGZO thin‐film transistors with mf‐PVD SiO2 as an etch‐stop‐layer M Nag, S Steudel, A Bhoolokam, A Chasin, M Rockele, K Myny, J Maas, ... Journal of the Society for Information Display 22 (1), 23-28, 2014 | 41 | 2014 |
| Amorphous indium-gallium-zinc-oxide as electron transport layer in organic photodetectors H Arora, PE Malinowski, A Chasin, D Cheyns, S Steudel, S Schols, ... Applied Physics Letters 106 (14), 2015 | 38 | 2015 |
| Understanding and modelling the PBTI reliability of thin-film IGZO transistors A Chasin, J Franco, K Triantopoulos, H Dekkers, N Rassoul, A Belmonte, ... 2021 IEEE International Electron Devices Meeting (IEDM), 31.1. 1-31.1. 4, 2021 | 34 | 2021 |
| Efficient physical defect model applied to PBTI in high-κ stacks G Rzepa, J Franco, A Subirats, M Jech, A Chasin, A Grill, M Waltl, ... 2017 IEEE International Reliability Physics Symposium (IRPS), XT-11.1-XT-11.6, 2017 | 34 | 2017 |
| Novel back‐channel‐etch process flow based a‐IGZO TFTs for circuit and display applications on PEN foil M Nag, M Rockele, S Steudel, A Chasin, K Myny, A Bhoolokam, ... Journal of the Society for Information Display 21 (9), 369-375, 2013 | 34 | 2013 |
| Back-channel-etch amorphous indium–gallium–zinc oxide thin-film transistors: The impact of source/drain metal etch and final passivation M Nag, A Bhoolokam, S Steudel, A Chasin, K Myny, J Maas, ... Japanese Journal of Applied Physics 53 (11), 111401, 2014 | 33 | 2014 |
Ben KaczerimecOverená e-mailová adresa na: imec.be
