Yasutaka WADA
Yasutaka WADA
Department of Information Science, Meisei University
Overená e-mailová adresa na:
Citované v
Citované v
Analyzing and mitigating the impact of manufacturing variability in power-constrained supercomputing
Y Inadomi, T Patki, K Inoue, M Aoyagi, B Rountree, M Schulz, ...
Proceedings of the international conference for high performance computing …, 2015
Method for controlling heterogeneous multiprocessor and multigrain parallelizing compiler
H Kasahara, K Kimura, J Shirako, Y Wada, M Ito, H Shikano
US Patent 8,250,548, 2012
A 45nm 37.3 GOPS/W heterogeneous multi-core SoC
Y Yuyama, M Ito, Y Kiyoshige, Y Nitta, S Matsui, O Nishii, A Hasegawa, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 100-101, 2010
Multigrain parallel processing on compiler cooperative chip multiprocessor
K Kimura, Y Wada, H Nakano, T Kodaka, J Shirako, K Ishizaka, ...
9th Annual Workshop on Interaction between Compilers and Computer …, 2005
Compiler control power saving scheme for multi core processors
J Shirako, N Oshiyama, Y Wada, H Shikano, K Kimura, H Kasahara
International Workshop on Languages and Compilers for Parallel Computing …, 2005
Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding
H Shikano, M Ito, M Onouchi, T Todaka, T Tsunoda, T Kodama, ...
IEEE Journal of Solid-State Circuits 43 (4), 902-910, 2008
Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores
A Hayashi, Y Wada, T Watanabe, T Sekiguchi, M Mase, J Shirako, ...
Languages and Compilers for Parallel Computing: 23rd International Workshop …, 2011
A linear time and space algorithm for optimal traffic-signal duration at an intersection
S Samra, A El-Mahdy, Y Wada
IEEE Transactions on Intelligent Transportation Systems 16 (1), 387-395, 2014
Morphological approach for the functional improvement of an artificial myocardial assist device using shape memory alloy fibres
Y Shiraishi, T Yambe, Y Saijo, F Sato, A Tanaka, M Yoshizawa, D Ogawa, ...
2007 29th Annual International Conference of the IEEE Engineering in …, 2007
Parallelization with automatic parallelizing compiler generating consumer electronics multicore API
T Miyamoto, S Asaka, H Mikami, M Mase, Y Wada, H Nakano, K Kimura, ...
2008 IEEE International Symposium on Parallel and Distributed Processing …, 2008
Performance evaluation of heterogeneous chip multi-processor with MP3 audio encoder
H Shikano, Y Suzuki, Y Wada, J Shirako, K Kimura, H Kasahara
IEEE Symposium on Low-Power and High Speed Chips (COOL Chips IX), 349-363, 2006
白子準, 吉田宗弘, 押山直人, 和田康孝, 中野浩史, 鹿野裕明, 木村啓二, ...
情報処理学会論文誌コンピューティングシステム (ACS) 47 (SIG12 (ACS15)), 147-158, 2006
Performance evaluation of compiler controlled power saving scheme
J Shirako, M Yoshida, N Oshiyama, Y Wada, H Nakano, H Shikano, ...
High-Performance Computing: 6th International Symposium, ISHPC 2005, Nara …, 2008
A scalable multiplier for arbitrary large numbers supporting homomorphic encryption
G Abozaid, A El-Mahdy, Y Wada
2013 Euromicro Conference on Digital System Design, 969-975, 2013
A parallelizing compiler cooperative heterogeneous multicore processor architecture
Y Wada, A Hayashi, T Masuura, J Shirako, H Nakano, H Shikano, ...
Transactions on High-Performance Embedded Architectures and Compilers IV …, 2011
ヘテロジニアスマルチコア向けソフトウェア開発フレームワークおよび API
林明宏, 和田康孝, 渡辺岳志, 関口威, 間瀬正啓, 白子準, 木村啓二, ...
情報処理学会論文誌コンピューティングシステム (ACS) 5 (1), 68-79, 2012
Software-cooperative power-efficient heterogeneous multi-core for media processing
H Shikano, M Ito, K Uchiyama, T Odaka, A Hayashi, T Masuura, M Mase, ...
2008 Asia and South Pacific Design Automation Conference, 736-741, 2008
Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding
M Ito, T Todaka, T Tsunoda, H Tanaka, T Kodama, H Shikano, M Onouchi, ...
2007 IEEE Symposium on VLSI Circuits, 18-19, 2007
Development of an FPGA Controlled" Mini-Car" Toward Autonomous Driving
M Aoto, Y Wada, Y Numata
2018 International Conference on Field-Programmable Technology (FPT), 400-402, 2018
Towards FHE in embedded systems: A preliminary codesign space exploration of a HW/SW very large multiplier
G Abozaid, A Tisserand, A El-Mahdy, Y Wada
IEEE Embedded Systems Letters 7 (3), 77-80, 2015
Systém momentálne nemôže vykonať operáciu. Skúste to neskôr.
Články 1–20