| Cost-efficient overclocking in immersion-cooled datacenters M Jalili, I Manousakis, Í Goiri, PA Misra, A Raniwala, H Alissa, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 42 | 2021 |
| A reliable 3D MLC PCM architecture with resistance drift predictor M Jalili, M Arjomand, H Sarbazi-Azad 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems …, 2014 | 35 | 2014 |
| CPU overclocking: A performance assessment of air, cold plates, and two-phase immersion cooling B Ramakrishnan, H Alissa, I Manousakis, R Lankston, R Bianchini, W Kim, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 11 …, 2021 | 32 | 2021 |
| Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories M Jalili, H Sarbazi-Azad 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016 | 30 | 2016 |
| Improving MLC PCM performance through relaxed write and read for intermediate resistance levels S Rashidi, M Jalili, H Sarbazi-Azad ACM Transactions on Architecture and Code Optimization (TACO) 15 (1), 1-31, 2018 | 25 | 2018 |
| Endurance-Aware Security Enhancement in Non-Volatile Memories Using Compression and Selective Encryption M Jalili, H Sarbazi-Azad IEEE Transactions on Computers, 2017 | 22 | 2017 |
| Bless: A simple and efficient scheme for prolonging pcm lifetime M Asadinia, M Jalili, H Sarbazi-Azad Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 21 | 2016 |
| A survey on pcm lifetime enhancement schemes S Rashidi, M Jalili, H Sarbazi-Azad ACM Computing Surveys (CSUR) 52 (4), 1-38, 2019 | 20 | 2019 |
| Tolerating more hard errors in MLC PCMs using compression M Jalili, H Sarbazi-Azad 2016 IEEE 34th International Conference on Computer Design (ICCD), 304-311, 2016 | 16 | 2016 |
| A compression-based morphable PCM architecture for improving resistance drift tolerance M Jalili, H Sarbazi-Azad 2014 IEEE 25th International Conference on Application-Specific Systems …, 2014 | 13 | 2014 |
| Reducing load latency with cache level prediction M Jalili, M Erez 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 9 | 2022 |
| Managing prefetchers with deep reinforcement learning M Jalili, M Erez IEEE Computer Architecture Letters 21 (2), 105-108, 2022 | 7 | 2022 |
| Power-efficient partially-adaptive routing in on-chip mesh networks M Jalili, J Bourgeois, H Sarbazi-Azad 2016 International SoC Design Conference (ISOCC), 65-66, 2016 | 5 | 2016 |
| Express read in MLC phase change memories M Jalili, H Sarbazi-Azad ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (3 …, 2018 | 4 | 2018 |
| Data block partitioning for recovering stuck-at faults in PCMs M Asadinia, M Jalili, H Sarbazi-Azad 2017 International Conference on Networking, Architecture, and Storage (NAS …, 2017 | 4 | 2017 |
| Efficient processor allocation in a reconfigurable cmp architecture for dark silicon era F Aghaaliakbari, M Hoveida, M Arjomand, M Jalili, H Sarbazi-Azad 2016 IEEE 34th International Conference on Computer Design (ICCD), 336-343, 2016 | 4 | 2016 |
| Overclocking in immersion-cooled datacenters PA Misra, I Manousakis, E Choukse, M Jalili, Í Goiri, A Raniwala, ... IEEE Micro 42 (4), 10-17, 2022 | 3 | 2022 |
| Harvesting L2 Caches in Server Processors M Jalili, M Erez arXiv preprint arXiv:2301.04228, 2023 | 2 | 2023 |
| An efficient on-chip network with packet compression capability M Vafaiee, M Jalili, R Sabbaghi-Nadooshan, H Sarbazi-Azad 2016 International SoC Design Conference (ISOCC), 7-8, 2016 | 2 | 2016 |
| Revisiting Processor Allocation and Application Mapping in Future CMPs in Dark Silicon Era M Hoveida, F Aghaaliakbari, M Jalili, R Bashizade, M Arjomand, ... Advances in Computers 110, 35-81, 2018 | 1 | 2018 |
Hamid Sarbazi-AzadProfessor of Computer Science and Engineering, Sharif University of Technology & IPMVerified email at sharif.edu
