| PRESENT: An ultra-lightweight block cipher A Bogdanov, LR Knudsen, G Leander, C Paar, A Poschmann, ... Cryptographic Hardware and Embedded Systems-CHES 2007: 9th International …, 2007 | 3729 | 2007 |
| Understanding cryptography C Paar, J Pelzl Springer-Verlag Berlin Heidelberg, 2010 | 2414 | 2010 |
| PRINCE – A Low-Latency Block Cipher for Pervasive Computing Applications J Borghoff, A Canteaut, T Güneysu, EB Kavun, M Knezevic, LR Knudsen, ... Advances in Cryptology–ASIACRYPT 2012: 18th International Conference on the …, 2012 | 1108 | 2012 |
| A survey of lightweight-cryptography implementations T Eisenbarth, S Kumar, C Paar, A Poschmann, L Uhsadel IEEE Design & Test of Computers 24 (6), 522-533, 2007 | 710 | 2007 |
| A stochastic model for differential side channel cryptanalysis W Schindler, K Lemke, C Paar Cryptographic Hardware and Embedded Systems–CHES 2005: 7th International …, 2005 | 629 | 2005 |
| An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists AJ Elbirt, W Yip, B Chetwynd, C Paar IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (4), 545-557, 2001 | 602 | 2001 |
| Pushing the limits: A very compact and a threshold implementation of AES A Moradi, A Poschmann, S Ling, C Paar, H Wang Advances in Cryptology–EUROCRYPT 2011: 30th Annual International Conference …, 2011 | 596 | 2011 |
| New lightweight DES variants G Leander, C Paar, A Poschmann, K Schramm Fast Software Encryption: 14th International Workshop, FSE 2007, Luxembourg …, 2007 | 400 | 2007 |
| Stealthy dopant-level hardware trojans GT Becker, F Regazzoni, C Paar, WP Burleson Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013 | 381 | 2013 |
| On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme T Eisenbarth, T Kasper, A Moradi, C Paar, M Salmasizadeh, ... Advances in Cryptology–CRYPTO 2008: 28th Annual International Cryptology …, 2008 | 381 | 2008 |
| Security in automotive bus systems M Wolf, A Weimerskirch, C Paar Workshop on Embedded Security in Cars, 1-13, 2004 | 376 | 2004 |
| Efficient VLSI architectures for bit-parallel computation in Galois fields C Paar PhD thesis, Inst. for Experimental Math., Univ. of Essen, 1994 | 362 | 1994 |
| {DROWN}: Breaking {TLS} Using {SSLv2} N Aviram, S Schinzel, J Somorovsky, N Heninger, M Dankel, J Steube, ... 25th USENIX Security Symposium (USENIX Security 16), 689-706, 2016 | 327 | 2016 |
| A High-Performance Reconfigurable Elliptic Curve Processor for GF(2m) G Orlando, C Paar International Workshop on Cryptographic Hardware and Embedded Systems, 41-56, 2000 | 319 | 2000 |
| Optimal extension fields for fast arithmetic in public-key algorithms DV Bailey, C Paar Advances in Cryptology—CRYPTO'98: 18th Annual International Cryptology …, 1998 | 318 | 1998 |
| On the vulnerability of FPGA bitstream encryption against power analysis attacks: Extracting keys from Xilinx Virtex-II FPGAs A Moradi, A Barenghi, T Kasper, C Paar Proceedings of the 18th ACM conference on Computer and communications …, 2011 | 317 | 2011 |
| Montgomery modular exponentiation on reconfigurable hardware T Blum, C Paar Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No. 99CB36336 …, 1999 | 313 | 1999 |
| Templates vs. stochastic methods: A performance analysis for side channel cryptanalysis B Gierlichs, K Lemke-Rust, C Paar Cryptographic Hardware and Embedded Systems-CHES 2006: 8th International …, 2006 | 304 | 2006 |
| High-radix Montgomery modular exponentiation on reconfigurable hardware T Blum, C Paar IEEE transactions on computers 50 (7), 759-764, 2001 | 286 | 2001 |
| A new architecture for a parallel finite field multiplier with low complexity based on composite fields C Paar IEEE Transactions on Computers 45 (7), 856-861, 1996 | 285 | 1996 |
